According to Taiwan's CNA and TechNews, NEO Semiconductor unveiled a new embedded-memory technology called X-SRAM and a companion NEO.AI platform at the FMS 2026 conference on August 6, 2026, claiming up to five times the density of traditional SRAM. Acer founder Stan Shih (施振榮), via the Stan Shih Foundation (智榮基金會), said memory will be key to AI's next stage of development.
What Did NEO Semiconductor Announce at FMS 2026?
According to CNA, NEO Semiconductor — an AI memory company founded by Silicon Valley entrepreneur Fu-Chang Hsu (許富菖) — announced a new generation of AI chip embedded-memory technology called X-SRAM on August 6, 2026, at Future Memory and Storage (FMS 2026), the annual global memory and storage industry conference. The company simultaneously launched a companion platform, NEO.AI. TechNews reported the same announcement, describing the pairing of X-SRAM and NEO.AI as intended to address insufficient embedded memory capacity in AI chips.
What Limitation Does Traditional SRAM Face?
CNA reported that traditional SRAM (Static Random-Access Memory) is approaching its scaling limits at advanced process nodes, which constrains growth in on-chip cache capacity. This scaling ceiling is the specific problem NEO Semiconductor's announcement targets: the company frames X-SRAM and NEO.AI as new technology aimed at solving AI chips' embedded-memory capacity shortfall, a challenge both CNA and TechNews cited in their coverage of the FMS 2026 launch.
What Performance Gains Does X-SRAM Claim?
Both CNA and TechNews reported the same set of figures from NEO Semiconductor. The company said X-SRAM uses a new memory architecture that provides up to five times the density of traditional SRAM. It said this could raise AI chip embedded-memory capacity from a current range of roughly 200MB to 400MB up to a range of 1GB to 2GB. NEO Semiconductor also projected that X-SRAM could cut High Bandwidth Memory (HBM) access power consumption by an estimated 50% to 80%.
| Metric | Current (per NEO Semiconductor) | With X-SRAM (per NEO Semiconductor) |
|---|
| Density vs. traditional SRAM | 1x (baseline) | Up to 5x |
| Embedded memory capacity | ~200MB–400MB | 1GB–2GB (projected) |
| HBM access power consumption | Baseline | Estimated 50%–80% reduction |
These figures are NEO Semiconductor's own stated projections, as reported by CNA and TechNews; both outlets attribute the numbers directly to the company's own statements at the announcement.
How Does Stan Shih View Memory Technology's Role in AI?
Acer founder Stan Shih (施振榮) commented on the announcement through a press release issued by his Stan Shih Foundation (智榮基金會). Per CNA, Shih said AI is rapidly transforming global industries and that memory will be a key pillar supporting the next stage of AI development — a statement TechNews reported in near-identical wording. CNA further quoted Shih saying that NEO Semiconductor's continued rollout of innovations such as X-SRAM and NEO.AI offers a new direction for breaking through AI memory bottlenecks, and that he hopes these innovations bring more possibilities for the semiconductor industry in Taiwan and globally.
What This Means
The two threads in this coverage line up: CNA's reporting on SRAM's approach to its scaling limits at advanced nodes explains why an embedded-memory architecture claiming up to five times the density — and a jump from roughly 200MB–400MB to 1GB–2GB of capacity — would matter to AI chip design. Stan Shih's comments, issued through his foundation rather than through NEO Semiconductor itself, add a Taiwan semiconductor-industry voice to a launch whose density, capacity, and power figures currently rest on the company's own statements as relayed by CNA and TechNews.