SK Hynix and Sandisk Publish First HBF Standard Spec via OCP, Aiming at the AI Inference Memory Wall

When and where the first HBF standard spec landed

SK Hynix (SK海力士) announced on August 4, 2026 that it had jointly published the first standard specification for High Bandwidth Flash (HBF) with Sandisk, according to TechNews. Inside.com.tw reported the same announcement, noting that SK Hynix and Sandisk published the spec together through the Open Compute Project (OCP). Both outlets place the release on the opening day of FMS (Future of Memory and Storage) 2026, the annual memory and storage industry conference held August 4–6 at the Santa Clara Convention Center in California, per Inside.com.tw.

From partnership to published standard: the timeline

According to TechNews, the new spec is the first concrete output of a collaboration that began in August 2025, when SK Hynix and Sandisk launched HBF standardization efforts, followed by the formal establishment of the HBF Alliance in February 2026 — roughly six months before this specification was released. Inside.com.tw corroborates the same sequence, adding that the gap between the alliance's founding and this spec is six months, while the gap since the original 2025 partnership is a full year.

What the spec actually defines: capacity, bandwidth, interconnect

Both outlets describe the same technical parameters. TechNews reports the spec defines two capacity configurations built on 8-layer and 16-layer stacked NAND flash chips, topping out at 512GB, matched by Inside.com.tw's figure of a 512GB capacity ceiling per HBF device. Bandwidth is split into three tiers — Grade 1 through Grade 3 — covering roughly 0.4TB/s to 3.0TB/s, a range confirmed identically by both TechNews and Inside.com.tw.

On the interconnect side, TechNews reports HBF connects to processors using the industry-standard UCIe (Universal Chiplet Interconnect Express) interface, which it says lays the groundwork for flexible connections between HBF and different chip types such as GPUs and CPUs. Inside.com.tw frames the same design choice as deliberately avoiding lock-in to a single processor architecture, since UCIe is a general-purpose heterogeneous chiplet connection standard that both GPUs and CPUs can use. TechNews additionally notes the spec was formally issued by OCP, the world's largest open data-center technology collaboration organization, making it an open industry standard rather than a proprietary one.

Why AI inference is driving the case for HBF

TechNews quotes SK Hynix Vice President Kim Chun-sung saying the rapid spread of AI applications is pushing the entire data-processing architecture into a critical restructuring period, and that through HBF the company will break the boundary between memory and storage to help build a new architecture that improves overall system efficiency. Inside.com.tw separately cites an SK Hynix official press release in which Kim Chun-sung, described there as Executive Vice President, said AI applications are proliferating so fast that the overall data-processing structure has reached a point where it must be redesigned, and that HBF will expand the boundary between memory and storage.

Sandisk's side of the argument, per Inside.com.tw, comes from Chief Technology Officer Alper Ilkbahar, who said AI inference is creating a new set of memory requirements, and that this specification gives system designers a practical path to move high-capacity, high-bandwidth memory next to compute units — a step he called important for the token economics of large-scale AI workloads.

SK Hynix and Samsung push NAND chip technology forward

Alongside the HBF spec, TechNews reports SK Hynix used the moment to unveil its tenth-generation (V10) 4D NAND flash memory, built on a 375-layer stack, for the first time, claiming a 2.5x improvement in power efficiency over the prior generation. TechNews adds that SK Hynix plans to begin mass production of high-performance, high-capacity enterprise SSDs based on this NAND in early 2027 — a plan Inside.com.tw confirms with matching figures: 375 layers, a 2.5x per-watt performance gain, and enterprise SSD (eSSD) mass production targeted for early 2027.

Inside.com.tw also reports that Samsung Electronics used the same event to unveil a BV-NAND prototype, which separates the memory cell array and peripheral control circuitry onto two bonded wafers to break past the 400-layer threshold, with Samsung claiming a 58% density improvement over its ninth-generation V9 NAND. Samsung additionally showed a conceptual zHBM design that stacks HBM directly on top of AI accelerator chips using through-silicon vias for vertical connection, per Inside.com.tw.

Who else is in the HBF Alliance

TechNews reports the HBF Alliance has, at this stage, drawn in Google and Tenstorrent. Inside.com.tw adds detail on how these members are engaged, reporting that both Google and AI chip startup Tenstorrent joined during the standardization process and participated in technical validation. Inside.com.tw further reports that an August 6 panel session titled "Breaking the Memory Wall with High Bandwidth Flash," moderated by Coughlin Associates President Thomas Coughlin, brought together SK Hynix Vice President Lim Eui-cheol, Sandisk Vice President Rajeev Nagabhirava, and Google DeepMind senior engineer Xiaoyu Ma on the same stage.

Commercialization timeline and the competitive backdrop

On timing, Inside.com.tw cites an April 2026 report from Korean outlet ETNews stating that Sandisk plans to ship HBF prototypes in the second half of 2026, with a pilot production line completed in the same period and expected to start operating around year-end; the outlet reported a 2027 commercialization target, with Japan as the leading candidate production site.

On demand, Inside.com.tw quotes Phison (群聯) CEO Pua Khein-Seng, who said that in 2026 memory makers are concentrating resources on HBM for AI servers, crowding out capital investment in NAND, and that the probability of a NAND supply shortage is extremely high.

On adoption, Inside.com.tw cites TrendForce noting that NVIDIA (輝達) has not announced any plans to adopt HBF, though industry sentiment is broadly positive; TrendForce suggests that over the long term a hybrid memory hierarchy could emerge in which HBM handles ultra-high-speed computation while HBF handles high-density data.

What this means

The sequence of dates laid out by TechNews and Inside.com.tw shows a fast standardization cycle: a August 2025 partnership became a February 2026 alliance, and became a published OCP specification within six months, timed deliberately to FMS 2026. Yet the same evidence set also contains an unresolved tension. Phison's Pua Khein-Seng frames 2026 as a year when memory makers are diverting capital toward HBM at NAND's expense, pointing to a possible NAND shortage — while Sandisk's own commercialization runway, per ETNews, stretches to 2027, and TrendForce notes that NVIDIA, the dominant AI accelerator maker, has not committed to HBF at all. The technical groundwork — a UCIe interconnect designed to attach to both GPUs and CPUs, and SK Hynix's parallel 375-layer V10 NAND roadmap aimed at 2027 eSSD production — is now standardized on paper, but the evidence gathered here does not show whether NAND supply constraints or processor-vendor adoption will move on the same timeline.