SemiconductorsFEATURE

Gate-All-Around Transistors: How Samsung, Intel, and TSMC Redesign the Channel After FinFET's Limits

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EffectStory 編輯部Editorial Team
Published · Updated
Samsung, Intel, and TSMC have each moved to Gate-All-Around (GAA) transistor structures as FinFET scaling reaches its limits. Samsung's first 3nm GAA process cut power by up to 45%, raised performance 23%, and shrank area 16% versus 5nm. Intel's RibbonFET is its first new transistor architecture since FinFET in 2011. TSMC's 2nm (N2) GAA node entered volume production in the fourth quarter of 2025.

What is the fundamental design of a Gate-All-Around (GAA) structure?

In GAA transistors, the gate surrounds all four faces of the channel through which electric current flows, rather than covering it from three sides as in FinFETCITE:E1. Samsung Semiconductor describes this as the defining feature of the structure adopted at 3nm and smaller nodesCITE:E1. Research organization imec, describing the nanosheet variant of GAA, states that the conduction channel is now completely surrounded by the high-k/metal gateCITE:E4. This full encirclement is the structural change that separates GAA from the FinFET architecture it replaces.

How much did Samsung's first-generation 3nm process improve over 5nm?

Samsung states that its first-generation 3nm GAA process reduces power consumption by up to 45%, improves performance by 23%, and reduces chip area by 16% compared with its 5nm processCITE:E2.

MetricChange vs. 5nm
Power consumptionUp to -45%
Performance+23%
Area-16%

Samsung reports these three figures together as the measured gains from moving its 3nm generation to the GAA architectureCITE:E2.

Why did Samsung choose wider-channel nanosheets over nanowires?

Samsung states that its proprietary GAA technology uses nanosheets with wider channels, which the company says deliver higher performance and greater energy efficiency than GAA implementations built on narrower-channel nanowiresCITE:E3. Samsung frames this as a deliberate design choice within the broader GAA category, distinguishing its nanosheet approach from nanowire-based alternativesCITE:E3. Combined with imec's description of a channel fully surrounded by the high-k/metal gate, the wider nanosheet geometry represents one specific way of implementing the four-sided gate coverage that defines GAACITE:E4CITE:E3.

What is Intel's RibbonFET, and how does it follow FinFET?

Intel states that RibbonFET, its implementation of a gate-all-around transistor, is the company's first new transistor architecture since it pioneered FinFET in 2011CITE:E5. Intel disclosed this in a July 26, 2021 announcement covering its process and packaging innovationsCITE:E5. The statement places RibbonFET as a direct successor to FinFET across a ten-year span at Intel, marking the company's own transition into the GAA category alongside Samsung.

Where does TSMC's 2nm (N2) GAA process stand in production?

TSMC states that its 2nm (N2) technology started volume production in the fourth quarter of 2025, as plannedCITE:E6. TSMC's disclosure ties the N2 node to its planned schedule without providing performance or power figures alongside the production-start statementCITE:E6.

What this means: three chipmakers now describe their leading-edge nodes using the same GAA principle of a channel surrounded on all four facesCITE:E1CITE:E4, but they disclose different kinds of detail about it. Samsung has published specific power, performance, and area deltas for its first 3nm generationCITE:E2, and separately explains a nanosheet-versus-nanowire design choice within GAACITE:E3. Intel has stated where RibbonFET sits in its own architectural history relative to FinFETCITE:E5. TSMC has confirmed a production-timing milestone for N2 without matching Samsung's quantified power/performance/area comparisonCITE:E6.

📊 Evidence

FAQ

What is the fundamental design of a Gate-All-Around (GAA) structure?

In GAA transistors, the gate surrounds all four faces of the channel through which electric current flows, rather than covering it from three sides as in FinFET…

How much did Samsung's first-generation 3nm process improve over 5nm?

Samsung states that its first-generation 3nm GAA process reduces power consumption by up to 45%, improves performance by 23%, and reduces chip area by 16% compa…

Why did Samsung choose wider-channel nanosheets over nanowires?

Samsung states that its proprietary GAA technology uses nanosheets with wider channels, which the company says deliver higher performance and greater energy eff…

What is Intel's RibbonFET, and how does it follow FinFET?

Intel states that RibbonFET, its implementation of a gate-all-around transistor, is the company's first new transistor architecture since it pioneered FinFET in…

📎 Sources

  1. semiconductor.samsung.com
  2. semiconductor.samsung.com
  3. imec-int.com
  4. intc.com
  5. tsmc.com

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EffectStory 編輯部Editorial Team

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