Google's Willow chip and USTC's Zuchongzhi processor have both demonstrated below-threshold quantum error correction, and IonQ has hit 99.99% two-qubit gate fidelity — but these remain laboratory and component milestones. IBM's roadmap targets a 200-logical-qubit fault-tolerant machine by 2029, starting from today's 156-qubit Heron processor. Meanwhile, NIST's post-quantum encryption standards are already finalized, so cryptographic defense does not have to wait for that hardware timeline.
Below-Threshold Breakthroughs Have Arrived: What Milestones Did Google Willow and Zuchongzhi Reach in the Error-Correction Race?
Google's Willow chip and USTC's Zuchongzhi processor each demonstrated below-threshold quantum error correction in 2024–2025, marking parallel laboratory milestones rather than usable fault-tolerant computers.
Google's Willow chip, built with 105 physical qubits, achieved a "below threshold" error-correction demonstration in late 2024: for each increase in code distance, the logical error rate dropped by a factor of about 2.14 (Λ=2.14), and at code distance-7 the logical qubit's error rate per correction cycle fell to 0.143%CITE:E1. The result is described as a quantum memory milestone, not yet operational fault-tolerant computationCITE:E1.
USTC's team, led by Pan Jianwei, is not behind on this front: the "Zuchongzhi 3" processor, with 105 readable qubits, completed random circuit sampling roughly 15 orders of magnitude faster than the fastest supercomputers, and the follow-up "Zuchongzhi 3.2" achieved below-threshold error correction on a distance-7 surface code with an error suppression factor of about 1.4CITE:E2. Both results remain laboratory achievements rather than deployed computing systemsCITE:E1CITE:E2.
Component-Level Fidelity Nears the Fault-Tolerance Bar: How Close Does IonQ's 99.99% Gate Fidelity Bring Us to a Usable Fault-Tolerant Machine?
IonQ announced in October 2025 that its trapped-ion two-qubit gate fidelity reached 99.99%, a component-level figure required for fault tolerance rather than evidence of a complete fault-tolerant system.
IonQ frames the "four nines" figure as clearing a key hardware bar on the path toward fault-tolerant quantum computingCITE:E3. The metric describes a single gate operation's fidelity, not a full processor, a full error-correcting code, or a demonstrated logical qubit — it sits alongside Willow's and Zuchongzhi's error-correction results as another piece of the puzzle rather than the finished pictureCITE:E3.
How Will IBM Deliver on Its 2029 Promise? The Roadmap From Heron to Starling
IBM has set 2029 as the target year to deliver Starling, its first large-scale fault-tolerant quantum computer, while its current largest processor, Heron, holds only 156 physical qubits.
Starling's specification calls for 200 logical qubits executing 100 million quantum gate operations, using quantum low-density parity-check (qLDPC) codes that IBM says can cut physical-qubit overhead by about 90% compared with earlier error-correction schemesCITE:E4. As of the roadmap's publication, these are targets on paper, not delivered hardware — IBM's currently deployed Heron-class processor tops out at 156 physical qubits, underscoring the scale of the jump the company still needs to execute over the next several yearsCITE:E4.
The Quantum Threat Countdown Has Already Started: Why Can't Post-Quantum Encryption Migration Wait Until 2029?
The U.S. National Institute of Standards and Technology (NIST) finalized its first three post-quantum encryption standards on August 13, 2024, giving governments and enterprises a path to begin migration now rather than waiting for fault-tolerant hardware.
The three standards — FIPS 203 (ML-KEM), FIPS 204 (ML-DSA), and FIPS 205 (SLH-DSA) — were released as finalized specifications, not drafts, meaning organizations can adopt them immediatelyCITE:E5. Cryptographic risk does not require a fully mature fault-tolerant machine to materialize before it matters: NIST's migration guidance operates on its own timeline, independent of whether Willow, Zuchongzhi, IonQ, or IBM hit their next milestonesCITE:E5.
Reality Check: Why Does Academia Remain Skeptical About Fault-Tolerance Timelines, and Where Is the Killer App?
Every quantum computer operating today remains in the noisy intermediate-scale quantum (NISQ) era, with no commercial "quantum advantage" killer application yet demonstrated, even as IBM and Quantinuum each target large-scale fault-tolerant machines by the end of this decade.
IBM's target is 2029; Quantinuum's is 2030 — both companies' large-scale fault-tolerant milestones appear in a roadmap survey that also notes academic disagreement over whether either timeline will holdCITE:E6. The gap between the milestones covered above — Willow's and Zuchongzhi's below-threshold error correction, IonQ's 99.99% gate fidelity, and IBM's Starling specification — and an operating fault-tolerant computer running commercially useful applications is exactly what this NISQ-era assessment describes: the individual results are real, but killer-app-level practical use remains years away by the industry's own stated targetsCITE:E6.
Milestones at a Glance
| Entity | Milestone | Key Number(s) | Status |
|---|
| Google (Willow) | Below-threshold error correction | 105 physical qubits, Λ=2.14, 0.143% error/cycle at distance-7 | Laboratory demoCITE:E1 |
| USTC (Zuchongzhi) | Random circuit sampling / below-threshold correction | 105 readable qubits, ~15 orders of magnitude faster than supercomputers; Zuchongzhi 3.2 error suppression ~1.4 | Laboratory demoCITE:E2 |
| IonQ | Two-qubit gate fidelity | 99.99% (Oct. 2025) | Component-levelCITE:E3 |
| IBM | Starling fault-tolerant computer | Target: 200 logical qubits, 100M gate operations, ~90% qubit-overhead reduction; current Heron: 156 physical qubits | Roadmap target, 2029CITE:E4 |
| NIST | Post-quantum encryption standards | FIPS 203, 204, 205 finalized Aug. 13, 2024 | Already releasedCITE:E5 |
Taken together, the picture splits into two tracks. On the hardware track, Google, USTC, and IonQ have each cleared distinct technical thresholds — below-threshold error correction and four-nines gate fidelity — while IBM has published a specific 2029 target that requires closing the gap between its current 156-qubit Heron and a 200-logical-qubit StarlingCITE:E1CITE:E2CITE:E3CITE:E4. On the defense track, NIST's cryptographic standards are already finalized and actionable today, independent of when — or whether — the hardware track's 2029–2030 targets are metCITE:E5. The tension is between milestone reality and application reality: the components exist, but the roadmap survey behind IBM's and Quantinuum's targets itself flags unresolved academic doubt about the timeline, and no commercial killer application has emerged from the NISQ era so farCITE:E6.