NVIDIA and Intel are moving optics from pluggable modules into co-packaged, chip-integrated designs to cut per-bit power in AI data-center networking. Intel's Optical Compute Interconnect reaches 4 Tb/s bidirectional at about 5 pJ/bit, versus roughly 15 pJ/bit for pluggable transceivers, while NVIDIA's Quantum-X Photonics switch delivers 144 ports of 800Gb/s InfiniBand with 3.5x power efficiency and 4x fewer lasers. imec's CMOS-based manufacturing and DWDM roadmap toward 400Gb/s underpin the cost and scaling path both vendors build on.
How does silicon photonics break the power bottleneck in AI data centers?
Intel's co-packaged silicon photonics solution consumes about 5 picojoules per bit, compared with roughly 15 pJ/bit for pluggable optical transceiver modulesCITE:E5. NVIDIA's co-packaged optics switches integrate photonics innovations with 4x fewer lasers, delivering 3.5x more power efficiency, 63x greater signal integrity, and 10x better network resiliency at scale, along with 1.3x faster deployment compared with traditional methods, according to NVIDIACITE:E1.
What performance breakthroughs define NVIDIA's Quantum-X Photonics switch design?
NVIDIA's Quantum-X Photonics switches provide 144 ports of 800Gb/s InfiniBand connectivity built on 200Gb/s SerDes technologyCITE:E2. The switches use a liquid-cooled design to efficiently cool the onboard silicon photonics, NVIDIA statesCITE:E2. NVIDIA announced the Quantum-X Photonics switch as part of its Spectrum-X co-packaged optics networking line on March 18, 2025CITE:E1.
How does Intel's Optical Compute Interconnect integrate optics on chip?
Intel's first Optical Compute Interconnect (OCI) chiplet supports up to 4 terabits per second of bidirectional data transfer and is compatible with PCIe Gen5CITE:E3. The fully integrated OCI chiplet combines a silicon photonics integrated circuit (PIC) — which includes on-chip lasers and optical amplifiers — with an electrical IC, Intel saysCITE:E4. Intel unveiled this chiplet on June 26, 2024CITE:E3.
Why does CMOS manufacturing give silicon photonics a cost advantage?
Integrated silicon photonics uses existing CMOS infrastructure to manufacture optical circuits, imec states, realizing cost benefits through economies of scaleCITE:E6.
What is the roadmap for scaling bandwidth with DWDM silicon photonics?
imec's dense wavelength-division multiplexing (DWDM) silicon photonics technology offers a path to scale optical links toward 400Gb/s, using eight channels of 50Gb/s each (8x50Gb/s)CITE:E7.
Key figures at a glance
| Source | Power Efficiency | Bandwidth | Other Metrics |
|---|
| NVIDIA Quantum-X Photonics / Spectrum-X co-packaged optics | 3.5x power efficiency, 4x fewer lasersCITE:E1 | 144 ports x 800Gb/s InfiniBand, 200Gb/s SerDesCITE:E2 | 63x signal integrity, 10x network resiliency, 1.3x faster deploymentCITE:E1 |
| Intel Optical Compute Interconnect (OCI) chiplet | 5 pJ/bit vs. 15 pJ/bit for pluggable transceiversCITE:E5 | 4 Tb/s bidirectional, PCIe Gen5-compatibleCITE:E3 | PIC integrates on-chip lasers and optical amplifiers with an electrical ICCITE:E4 |
| imec DWDM silicon photonics | Cost benefits via CMOS economies of scaleCITE:E6 | Path to 400Gb/s (8x50Gb/s)CITE:E7 | — |
What this means
NVIDIA and Intel are pursuing the same underlying problem — per-bit energy consumption in AI data-center interconnects — from two different layers. Intel's 5 pJ/bit figure is measured against pluggable transceivers at about 15 pJ/bitCITE:E5, while NVIDIA's 3.5x efficiency and 4x laser-count reduction are measured against unspecified "traditional methods"CITE:E1; the two claims use different baselines but point in the same direction: co-packaging optics with compute silicon rather than routing through separate optical modules. imec's CMOS-based manufacturing processCITE:E6 and its DWDM roadmap toward 400Gb/sCITE:E7 describe the process economics and bandwidth-scaling path that underlie vendor-specific products such as NVIDIA's 144-port Quantum-X Photonics switchCITE:E2 and Intel's 4 Tb/s OCI chipletCITE:E3CITE:E4.
Author's Take・EffectStory 編輯部
The numbers here point to a common architectural shift: moving optics from pluggable modules into co-packaged, on-chip integration. Intel's 5 pJ/bit figure against 15 pJ/bit for pluggable transceivers, and NVIDIA's 4x reduction in laser count, both target the same cost driver — the optical-electrical conversion overhead that dominates interconnect power budgets at scale. What stands out is that NVIDIA's Quantum-X Photonics switch (144 ports x 800Gb/s) and Intel's OCI chiplet (4 Tb/s bidirectional) sit at different layers of the stack — switch fabric versus chip-to-chip interconnect — rather than competing head-to-head. The metric worth tracking next is whether Intel's OCI chiplet moves from a standalone chiplet announcement into a shipping product reporting port-density and bandwidth figures comparable to NVIDIA's already-specified Quantum-X switch, which would signal the interconnect layer converging on production timelines as fast as the switch layer already has.